Page tree
Pin NumberCPU Pin NumberPort NameALT0ALT1ALT2ALT3ALT4ALT5ALT6ALT7ALT8ALT9
J1.1-GND
J1.2-GND
J1.3C1SD1_CLKusdhc1.CLKgpt2.COMPARE2sai2.MCLKspdif.INweim.ADDR[20]gpio2.IO[17]ccm.OUT0observe_mux.OUT[0]usb.OTG1_OC
J1.4D1CSI_DATA7csi.DATA[9]usdhc2.DATA7ecspi1.MISOweim.AD[7]gpio4.IO[28]sai1.TX_DATAtpsmp.HDATA[31]usdhc1.VSELECTesai.TX0
J1.5C2SD1_CMDusdhc1.CMDgpt2.COMPARE1sai2.RX_SYNCspdif.OUTweim.ADDR[19]gpio2.IO[16]sdma.EXT_EVENT[0]tpsmp.HDATA[18]usb.OTG1_PWR
J1.6D2CSI_DATA6csi.DATA[8]usdhc2.DATA6ecspi1.MOSIweim.AD[6]gpio4.IO[27]sai1.RX_DATAtpsmp.HDATA[30]usdhc1.RESET_Besai.TX5_RX0
J1.7B3SD1_DATA0usdhc1.DATA0gpt2.COMPARE3sai2.TX_SYNCcan1.TXweim.ADDR[21]gpio2.IO[18]ccm.OUT1observe_mux.OUT[1]anatop.OTG1_ID
J1.8D3CSI_DATA5csi.DATA[7]usdhc2.DATA5ecspi1.SS0weim.AD[5]gpio4.IO[26]sai1.TX_BCLKtpsmp.HDATA[29]usdhc1.CD_Besai.TX_CLK
J1.9B2SD1_DATA1usdhc1.DATA1gpt2.CLKsai2.TX_BCLKcan1.RXweim.ADDR[22]gpio2.IO[19]ccm.OUT2observe_mux.OUT[2]usb.OTG2_PWR
J1.10D4CSI_DATA4csi.DATA[6]usdhc2.DATA4ecspi1.SCLKweim.AD[4]gpio4.IO[25]sai1.TX_SYNCtpsmp.HDATA[28]usdhc1.WPesai.TX_FS
J1.11B1SD1_DATA2usdhc1.DATA2gpt2.CAPTURE1sai2.RX_DATAcan2.TXweim.ADDR[23]gpio2.IO[20]ccm.CLKO1observe_mux.OUT[3]usb.OTG2_OC
J1.12-GND
J1.13A2SD1_DATA3usdhc1.DATA3gpt2.CAPTURE2sai2.TX_DATAcan2.RXweim.ADDR[24]gpio2.IO[21]ccm.CLKO2observe_mux.OUT[4]anatop.OTG2_ID
J1.14E1CSI_DATA3csi.DATA[5]usdhc2.DATA3ecspi2.MISOweim.AD[3]gpio4.IO[24]sai1.RX_BCLKtpsmp.HDATA[27]uart5.CTS_Besai.RX_CLK
J1.15-GND
J1.16E2CSI_DATA2csi.DATA[4]usdhc2.DATA2ecspi2.MOSIweim.AD[2]gpio4.IO[23]sai1.RX_SYNCtpsmp.HDATA[26]uart5.RTS_Besai.RX_FS
J1.17-NC
J1.18E3CSI_DATA1csi.DATA[3]usdhc2.DATA1ecspi2.SS0weim.AD[1]gpio4.IO[22]sai1.MCLKtpsmp.HDATA[25]uart5.RXesai.RX_HF_CLK
J1.19-NC
J1.20E4CSI_DATA0csi.DATA[2]usdhc2.DATA0ecspi2.SCLKweim.AD[0]gpio4.IO[21]src.INT_BOOTtpsmp.HDATA[24]uart5.TXesai.TX_HF_CLK
J1.21-NC
J1.22-GND
J1.23-NC
J1.24F5CSI_MCLKcsi.MCLKusdhc2.CD_Brawnand.CE2_Bi2c1.SDAweim.CS0_Bgpio4.IO[17]snvs_hp_wrapper.VIO_5_CTLtpsmp.HDATA[20]uart6.TXesai.TX3_RX2
J1.25-NC
J1.26E5CSI_PIXCLKcsi.PIXCLKusdhc2.WPrawnand.CE3_Bi2c1.SCLweim.OEgpio4.IO[18]snvs_hp_wrapper.VIO_5tpsmp.HDATA[21]uart6.RXesai.TX2_RX3
J1.27-NC
J1.28F2CSI_VSYNCcsi.VSYNCusdhc2.CLKi2c2.SDAweim.RWgpio4.IO[19]pwm7.OUTtpsmp.HDATA[22]uart6.RTS_Besai.TX4_RX1
J1.29-NC
J1.30F3CSI_HSYNCcsi.HSYNCusdhc2.CMDi2c2.SCLweim.LBA_Bgpio4.IO[20]pwm8.OUTtpsmp.HDATA[23]uart6.CTS_Besai.TX1
J1.31-GND
J1.32-GND
J1.33A15ENET2_TXD0enet2.TDATA[0]uart7.RXi2c4.SDAweim.EB_B[2]gpio2.IO[11]kpp.COL[5]sim_m.HADDR[18]anatop.24M_OUTepdc.SDDO[11]
J1.34C17ENET2_RXD0enet2.RDATA[0]uart6.TXi2c3.SCLenet1.MDIOgpio2.IO[8]kpp.ROW[4]sim_m.HADDR[15]usb.OTG1_PWRepdc.SDDO[8]
J1.35A16ENET2_TXD1enet2.TDATA[1]uart8.TXecspi4.SCLKweim.EB_B[3]gpio2.IO[12]kpp.ROW[6]sim_m.HADDR[19]usb.OTG2_PWRepdc.SDDO[12]
J1.36C16ENET2_RXD1enet2.RDATA[1]uart6.RXi2c3.SDAenet1.MDCgpio2.IO[9]kpp.COL[4]sim_m.HADDR[16]usb.OTG1_OCepdc.SDDO[9]
J1.37B15ENET2_TXENenet2.TX_ENuart8.RXecspi4.MOSIweim.ACLK_FREERUNgpio2.IO[13]kpp.COL[6]sim_m.HADDR[20]usb.OTG2_OCepdc.SDDO[13]
J1.38D16ENET2_RXERenet2.RX_ERuart8.RTS_Becspi4.SS0weim.ADDR[25]gpio2.IO[15]kpp.COL[7]sim_m.HADDR[22]global wdogepdc.SDDO[15]
J1.39D17ENET2_TX_CLKenet2.TX_CLKuart8.CTS_Becspi4.MISOanatop.ENET_REF_CLK2gpio2.IO[14]kpp.ROW[7]sim_m.HADDR[21]anatop.OTG2_IDepdc.SDDO[14]
J1.40B17ENET2_CRS_DVenet2.RX_ENuart7.TXi2c4.SCLweim.ADDR[26]gpio2.IO[10]kpp.ROW[5]sim_m.HADDR[17]anatop.ENET_REF_CLK_25Mepdc.SDDO[10]
J1.41-GND
J1.42-GND
J1.43A8LCD_PCLKlcdif.CLKlcdif.WR_RWNuart4.TXsai3.MCLKweim.CS2_Bgpio3.IO[0]ocotp_ctrl_wrapper.FUSE_LATCHEDsim_m.HADDR[23]wdog1.WDOG_RST_B_DEBepdc.SDCLK
J1.44-NC
J1.45B8LCD_DElcdif.ENABLElcdif.RD_Euart4.RXsai3.TX_SYNCweim.CS3_Bgpio3.IO[1]anatop.TESTI[0]sim_m.HADDR[24]ecspi2.RDYepdc.SDLE
J1.46C9LCD_VSYNClcdif.VSYNClcdif.BUSYuart4.RTS_Bsai3.RX_DATAwdog2.WDOG_Bgpio3.IO[3]anatop.TESTI[2]sim_m.HADDR[26]ecspi2.SS2epdc.SDCE[0]
J1.47D9LCD_HSYNClcdif.HSYNClcdif.RSuart4.CTS_Bsai3.TX_BCLKwdog3.WDOG_RST_B_DEBgpio3.IO[2]anatop.TESTI[1]sim_m.HADDR[25]ecspi2.SS1epdc.SDOE
J1.48E9LCD_RESETlcdif.RESETlcdif.CSca7_platform.EVENTIsai3.TX_DATAglobal wdoggpio3.IO[4]anatop.TESTI[3]sim_m.HADDR[27]ecspi2.SS3epdc.GDOE
J1.49-GND
J1.50-GND
J1.51B9LCD_DATA0lcdif.DATA[0]pwm1.OUTca7_platform.TRACE[0]enet1.1588_EVENT2_INi2c3.SDAgpio3.IO[5]src.BT_CFG[0]sim_m.HADDR[28]sai1.MCLKepdc.SDDO[0]
J1.52A9LCD_DATA1lcdif.DATA[1]pwm2.OUTca7_platform.TRACE[1]enet1.1588_EVENT2_OUTi2c3.SCLgpio3.IO[6]src.BT_CFG[1]sim_m.HADDR[29]sai1.TX_SYNCepdc.SDDO[1]
J1.53E10LCD_DATA2lcdif.DATA[2]pwm3.OUTca7_platform.TRACE[2]enet1.1588_EVENT3_INi2c4.SDAgpio3.IO[7]src.BT_CFG[2]sim_m.HADDR[30]sai1.TX_BCLKepdc.SDDO[2]
J1.54D10LCD_DATA3lcdif.DATA[3]pwm4.OUTca7_platform.TRACE[3]enet1.1588_EVENT3_OUTi2c4.SCLgpio3.IO[8]src.BT_CFG[3]sim_m.HADDR[31]sai1.RX_DATAepdc.SDDO[3]
J1.55C10LCD_DATA4lcdif.DATA[4]uart8.CTS_Bca7_platform.TRACE[4]enet2.1588_EVENT2_INspdif.SR_CLKgpio3.IO[9]src.BT_CFG[4]sim_m.HBURST[0]sai1.TX_DATAepdc.SDDO[4]
J1.56B10LCD_DATA5lcdif.DATA[5]uart8.RTS_Bca7_platform.TRACE[5]enet2.1588_EVENT2_OUTspdif.OUTgpio3.IO[10]src.BT_CFG[5]sim_m.HBURST[1]ecspi1.SS1epdc.SDDO[5]
J1.57A10LCD_DATA6lcdif.DATA[6]uart7.CTS_Bca7_platform.TRACE[6]enet2.1588_EVENT3_INspdif.LOCKgpio3.IO[11]src.BT_CFG[6]sim_m.HBURST[2]ecspi1.SS2epdc.SDDO[6]
J1.58D10LCD_DATA7lcdif.DATA[7]uart7.RTS_Bca7_platform.TRACE[7]enet2.1588_EVENT3_OUTspdif.EXT_CLKgpio3.IO[12]src.BT_CFG[7]sim_m.HMASTLOCKecspi1.SS3epdc.SDDO[7]
J1.59B11LCD_DATA8lcdif.DATA[8]spdif.INca7_platform.TRACE[8]csi.DATA[16]weim.DATA[0]gpio3.IO[13]src.BT_CFG[8]sim_m.HPROT[0]can1.TXepdc.PWRIRQ
J1.60A11LCD_DATA9lcdif.DATA[9]sai3.MCLKca7_platform.TRACE[9]csi.DATA[17]weim.DATA[1]gpio3.IO[14]src.BT_CFG[9]sim_m.HPROT[1]can1.RXepdc.PWRWAKE
J1.61E12LCD_DATA10lcdif.DATA[10]sai3.RX_SYNCca7_platform.TRACE[10]csi.DATA[18]weim.DATA[2]gpio3.IO[15]src.BT_CFG[10]sim_m.HPROT[2]can2.TXepdc.PWRCOM
J1.62D12LCD_DATA11lcdif.DATA[11]sai3.RX_BCLKca7_platform.TRACE[11]csi.DATA[19]weim.DATA[3]gpio3.IO[16]src.BT_CFG[11]sim_m.HPROT[3]can2.RXepdc.PWRSTAT
J1.63C12LCD_DATA12lcdif.DATA[12]sai3.TX_SYNCca7_platform.TRACE[12]csi.DATA[20]weim.DATA[4]gpio3.IO[17]src.BT_CFG[12]sim_m.HREADYOUTecspi1.RDYepdc.PWRCTRL[0]
J1.64B12LCD_DATA13lcdif.DATA[13]sai3.TX_BCLKca7_platform.TRACE[13]csi.DATA[21]weim.DATA[5]gpio3.IO[18]src.BT_CFG[13]sim_m.HRESPusdhc2.RESET_Bepdc.BDR[0]
J1.65-GND
J1.66-GND
J1.67A12LCD_DATA14lcdif.DATA[14]sai3.RX_DATAca7_platform.TRACE[14]csi.DATA[22]weim.DATA[6]gpio3.IO[19]src.BT_CFG[14]sim_m.HSIZE[0]usdhc2.DATA4epdc.SDSHR
J1.68D13LCD_DATA15lcdif.DATA[15]sai3.TX_DATAca7_platform.TRACE[15]csi.DATA[23]weim.DATA[7]gpio3.IO[20]src.BT_CFG[15]sim_m.HSIZE[1]usdhc2.DATA5epdc.GDRL
J1.69C13LCD_DATA16lcdif.DATA[16]uart7.TXca7_platform.TRACE_CLKcsi.DATA[1]weim.DATA[8]gpio3.IO[21]src.BT_CFG[24]sim_m.HSIZE[2]usdhc2.DATA6epdc.GDCLK
J1.70B13LCD_DATA17lcdif.DATA[17]uart7.RXca7_platform.TRACE_CTLcsi.DATA[0]weim.DATA[9]gpio3.IO[22]src.BT_CFG[25]sim_m.HWRITEusdhc2.DATA7epdc.GDSP
J1.71A13LCD_DATA18lcdif.DATA[18]pwm5.OUTca7_platform.EVENTOcsi.DATA[10]weim.DATA[10]gpio3.IO[23]src.BT_CFG[26]tpsmp.CLKusdhc2.CMDepdc.BDR[1]
J1.72D14LCD_DATA19lcdif.DATA[19]pwm6.OUTglobal wdogcsi.DATA[11]weim.DATA[11]gpio3.IO[24]src.BT_CFG[27]tpsmp.HDATA_DIRusdhc2.CLKepdc.VCOM[0]
J1.73C14LCD_DATA20lcdif.DATA[20]uart8.TXecspi1.SCLKcsi.DATA[12]weim.DATA[12]gpio3.IO[25]src.BT_CFG[28]tpsmp.HTRANS[0]usdhc2.DATA0epdc.VCOM[1]
J1.74B14LCD_DATA21lcdif.DATA[21]uart8.RXecspi1.SS0csi.DATA[13]weim.DATA[13]gpio3.IO[26]src.BT_CFG[29]tpsmp.HTRANS[1]usdhc2.DATA1epdc.SDCE[1]
J1.75A14LCD_DATA22lcdif.DATA[22]mqs.RIGHTecspi1.MOSIcsi.DATA[14]weim.DATA[14]gpio3.IO[27]src.BT_CFG[30]tpsmp.HDATA[0]usdhc2.DATA2epdc.SDCE[2]
J1.76B16LCD_DATA23lcdif.DATA[23]mqs.LEFTecspi1.MISOcsi.DATA[15]weim.DATA[15]gpio3.IO[28]src.BT_CFG[31]tpsmp.HDATA[1]usdhc2.DATA3epdc.SDCE[3]
J1.77-GND
J1.78-GND
J1.79-VDD_5V
J1.80-VDD_5V
J2.1-GND
J2.2-GND
J2.3-VDD_3V3
J2.4K13GPIO1_IO00i2c2.SCLgpt1.CAPTURE1anatop.OTG1_IDanatop.ENET_REF_CLK1mqs.RIGHTgpio1.IO[0]enet1.1588_EVENT0_INsrc.SYSTEM_RESETwdog3.WDOG_B
J2.5P8POR_Bsrc.POR_B
J2.6L15GPIO1_IO01i2c2.SDAgpt1.COMPARE1usb.OTG1_OCanatop.ENET_REF_CLK2mqs.LEFTgpio1.IO[1]enet1.1588_EVENT0_OUTsrc.EARLY_RESETwdog1.WDOG_B
J2.7-GND
J2.8L14GPIO1_IO02i2c1.SCLgpt1.COMPARE2usb.OTG2_PWRanatop.ENET_REF_CLK_25Musdhc1.WPgpio1.IO[2]sdma.EXT_EVENT[0]src.ANY_PU_RESETuart1.TX
J2.9T10BOOT_MODE0src.BOOT_MODE[0]gpio5.IO[10]
J2.10L17GPIO1_IO03i2c1.SDAgpt1.COMPARE3usb.OTG2_OCosc32k.32K_OUTusdhc1.CD_Bgpio1.IO[3]ccm.DI0_EXT_CLKsrc.TESTER_ACKuart1.RX
J2.11U10BOOT_MODE1src.BOOT_MODE[1]gpio5.IO[11]
J2.12M16GPIO1_IO04anatop.ENET_REF_CLK1pwm3.OUTusb.OTG1_PWRanatop.24M_OUTusdhc1.RESET_Bgpio1.IO[4]enet2.1588_EVENT0_INccm.PLL2_BYPuart5.TX
J2.13-GND
J2.14-GND
J2.15R6SNVS_TAMPER9snvs_lp_wrapper.TAMPER[9]gpio5.IO[9]
J2.16M17GPIO1_IO05anatop.ENET_REF_CLK2pwm4.OUTanatop.OTG2_IDcsi.FIELDusdhc1.VSELECTgpio1.IO[5]enet2.1588_EVENT0_OUTccm.PLL3_BYPuart5.RX
J2.17N9SNVS_TAMPER8snvs_lp_wrapper.TAMPER[8]gpio5.IO[8]
J2.18 GPIO1_IO06enet1.MDIOenet2.MDIOusb.OTG_PWR_WAKEcsi.MCLKusdhc2.WPgpio1.IO[6]ccm.WAITccm.REF_EN_Buart1.CTS_B
J2.19N10SNVS_TAMPER7snvs_lp_wrapper.TAMPER[7]gpio5.IO[7]
J2.20 GPIO1_IO07enet1.MDCenet2.MDCusb.OTG_HOST_MODEcsi.PIXCLKusdhc2.CD_Bgpio1.IO[7]ccm.STOPecspi1.TESTER_TRIGGERuart1.RTS_B
J2.21N11SNVS_TAMPER6snvs_lp_wrapper.TAMPER[6]gpio5.IO[6]
J2.22N17GPIO1_IO08pwm1.OUTwdog1.WDOG_Bspdif.OUTcsi.VSYNCusdhc2.VSELECTgpio1.IO[8]ccm.PMIC_RDYecspi2.TESTER_TRIGGERuart5.RTS_B
J2.23N8SNVS_TAMPER5snvs_lp_wrapper.TAMPER[5]gpio5.IO[5]
J2.24M15GPIO1_IO09pwm2.OUTglobal wdogspdif.INcsi.HSYNCusdhc2.RESET_Bgpio1.IO[9]usdhc1.RESET_Becspi3.TESTER_TRIGGERuart5.CTS_B
J2.25-GND
J2.26-GND
J2.27P9SNVS_TAMPER4snvs_lp_wrapper.TAMPER[4]gpio5.IO[4]
J2.28M14JTAG_TCKsjc.TCKgpt2.COMPARE2sai2.RX_DATAccm.OUT1pwm7.OUTgpio1.IO[14]osc32k.32K_OUT
J2.29P10SNVS_TAMPER3snvs_lp_wrapper.TAMPER[3]gpio5.IO[3]
J2.30P14JTAG_TMSsjc.TMSgpt2.CAPTURE1sai2.MCLKccm.CLKO1ccm.WAITgpio1.IO[11]sdma.EXT_EVENT[1]epit1.OUT
J2.31P11SNVS_TAMPER2snvs_lp_wrapper.TAMPER[2]gpio5.IO[2]
J2.32N16JTAG_TDIsjc.TDIgpt2.COMPARE1sai2.TX_BCLKccm.OUT0pwm6.OUTgpio1.IO[13]mqs.LEFT
J2.33R9SNVS_TAMPER1snvs_lp_wrapper.TAMPER[1]gpio5.IO[1]
J2.34N14JTAG_nTRSTsjc.TRSTBgpt2.COMPARE3sai2.TX_DATAccm.OUT2pwm8.OUTgpio1.IO[15]anatop.24M_OUT
J2.35-NC gpio5.IO[0]
J2.36N15JTAG_TDOsjc.TDOgpt2.CAPTURE2sai2.TX_SYNCccm.CLKO2ccm.STOPgpio1.IO[12]mqs.RIGHTepit2.OUT
J2.37-GND
J2.38P15JTAG_MODsjc.MODgpt2.CLKspdif.OUTanatop.ENET_REF_CLK_25Mccm.PMIC_RDYgpio1.IO[10]sdma.EXT_EVENT[0]
J2.39K14UART1_TXDuart1.TXenet1.RDATA[2]i2c3.SCLcsi.DATA[2]gpt1.COMPARE1gpio1.IO[16]anatop.USBPHY1_TSTI_TX_LS_MODEecspi4.TESTER_TRIGGERspdif.OUTuart5.TX
J2.40U12USB_OTG2_VBUS
J2.41K16UART1_RXDuart1.RXenet1.RDATA[3]i2c3.SDAcsi.DATA[3]gpt1.CLKgpio1.IO[17]anatop.USBPHY1_TSTI_TX_HS_MODEusdhc1.TESTER_TRIGGERspdif.INuart5.RX
J2.42T12USB_OTG1_VBUS
J2.43J14UART1_RTSuart1.RTS_Benet1.TX_ERusdhc1.CD_Bcsi.DATA[5]enet2.1588_EVENT1_OUTgpio1.IO[19]anatop.USBPHY1_TSTO_RX_SQUELCHqspi.TESTER_TRIGGERusdhc2.CD_Buart5.RTS_B
J2.44-GND
J2.45K15UART1_CTSuart1.CTS_Benet1.RX_CLKusdhc1.WPcsi.DATA[4]enet2.1588_EVENT1_INgpio1.IO[18]anatop.USBPHY1_TSTI_TX_DNusdhc2.TESTER_TRIGGERusdhc2.WPuart5.CTS_B
J2.46U13USB_OTG2_DP
J2.47J17UART2_TXDuart2.TXenet1.TDATA[2]i2c4.SCLcsi.DATA[6]gpt1.CAPTURE1gpio1.IO[20]anatop.USBPHY1_TSTO_RX_DISCON_DETrawnand.TESTER_TRIGGERecspi3.SS0
J2.48T13USB_OTG2_DN
J2.49J16UART2_RXDuart2.RXenet1.TDATA[3]i2c4.SDAcsi.DATA[7]gpt1.CAPTURE2gpio1.IO[21]anatop.USBPHY1_TSTO_RX_HS_RXDsjc.DONEecspi3.SCLK
J2.50-GND
J2.51H14UART2_RTSuart2.RTS_Benet1.COLcan2.RXcsi.DATA[9]gpt1.COMPARE3gpio1.IO[23]anatop.USBPHY1_TSTO_RX_FS_RXDsjc.FAILecspi3.MISO
J2.52U15USB_OTG1_DP
J2.53J15UART2_CTSuart2.CTS_Benet1.CRScan2.TXcsi.DATA[8]gpt1.COMPARE2gpio1.IO[22]anatop.USBPHY2_TSTO_RX_FS_RXDsjc.DE_Becspi3.MOSI
J2.54T15USB_OTG1_DN
J2.55-GND
J2.56-GND
J2.57H17UART3_TXDuart3.TXenet2.RDATA[2]csi.DATA[1]uart2.CTS_Bgpio1.IO[24]anatop.USBPHY1_TSTI_TX_DPsjc.JTAG_ACTanatop.OTG1_ID
J2.58T9PMIC_ON_REQsnvs_lp_wrapper.PMIC_ON_REQ
J2.59H16UART3_RXDuart3.RXenet2.RDATA[3]csi.DATA[0]uart2.RTS_Bgpio1.IO[25]anatop.USBPHY1_TSTI_TX_ENsim_m.HADDR[0]epit1.OUT
J2.60R8ONOFFsrc.RESET_B
J2.61G14UART3_RTSuart3.RTS_Benet2.TX_ERcan1.RXcsi.DATA[11]enet1.1588_EVENT1_OUTgpio1.IO[27]anatop.USBPHY2_TSTO_RX_HS_RXDsim_m.HADDR[2]wdog1.WDOG_B
J2.62-VDD_BAT
J2.63H15UART3_CTSuart3.CTS_Benet2.RX_CLKcan1.TXcsi.DATA[10]enet1.1588_EVENT1_INgpio1.IO[26]anatop.USBPHY1_TSTI_TX_HIZsim_m.HADDR[1]epit2.OUT
J2.64-ETH1_LED1
J2.65G17UART4_TXDuart4.TXenet2.TDATA[2]i2c1.SCLcsi.DATA[12]csu.CSU_ALARM_AUT[2]gpio1.IO[28]anatop.USBPHY1_TSTO_PLL_CLK20DIVsim_m.HADDR[3]ecspi2.SCLK
J2.66-ETH1_LED2
J2.67G16UART4_RXDuart4.RXenet2.TDATA[3]i2c1.SDAcsi.DATA[13]csu.CSU_ALARM_AUT[1]gpio1.IO[29]anatop.USBPHY2_TSTO_PLL_CLK20DIVsim_m.HADDR[4]ecspi2.SS0epdc.PWRCTRL[1]
J2.68-GND
J2.69F17UART5_TXDuart5.TXenet2.CRSi2c2.SCLcsi.DATA[14]csu.CSU_ALARM_AUT[0]gpio1.IO[30]anatop.USBPHY2_TSTO_RX_SQUELCHsim_m.HADDR[5]ecspi2.MOSIepdc.PWRCTRL[2]
J2.70 TXN
J2.71G13UART5_RXDuart5.RXenet2.COLi2c2.SDAcsi.DATA[15]csu.CSU_INT_DEBgpio1.IO[31]anatop.USBPHY2_TSTO_RX_DISCON_DETsim_m.HADDR[6]ecspi2.MISOepdc.PWRCTRL[3]
J2.72 TXP
J2.73-GND
J2.74-GND
J2.75P16CLK1_N
J2.76 RXN
J2.77P17CLK1_P
J2.78 RXP
J2.79-GND
J2.80-GND