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OTP通过BSEC外设存储。

OTP WORD 0

BitNameSizeValueDescription
31-7
25 bits
reserved
6is_closed1 bit
Close state



0device is in open state, authentication is optional.



1device is in close state, authentication is mandatory.
5-0
6 bits
reserved

OTP WORD 3

BitNameSizeValueDescription
31-30HSE_value2 bits
HSE value



0b00HSE is autodetected



0b01HSE is 24 MHz



0b10HSE is 25 MHz



0b11HSE is 26 MHz
29-27primary_boot_source3 bits
Primary boot source




If different from zero, identifies primary source used for boot



0No primary boot source is defined



1FMC NAND



2QSPI NOR



3eMMC



4SD



5QSPI NAND
26-24secondary_boot_source3 bits
Secondary boot source




If different from zero, identifies secondary source used for boot



0No secondary boot source is defined



1FMC NAND



2QSPI NOR



3eMMC



4SD



5QSPI NAND
23-16boot_source_disable8 bits
Disable boot source




if different from zero each bit disables a boot source



0b00000001disable FMC NAND boot source



0b00000010disable QSPI NOR boot source



0b00000100disable eMMC™ boot source



0b00001000disable SD boot source



0b00010000disable UART boot source



0b00100000disable USB boot source



0b01000000disable QSPI NAND boot source
15-15no_data_cache1 bit
Data cache enable enabling




If different from zero, data cache is not used by bootrom.



0Data cache is used by bootrom.



1Data cache is not used by bootrom.
14-7uart_intances_disabled8 bits
Uart instances disabled




If different from zero each bit disables an UART instance.




If all disable bits are set to 1 then all UARTs are enabled.



0b00000001reserved



0b00000010disable USART2



0b00000100disable USART3



0b00001000disable UART4



0b00010000disable UART5



0b00100000disable UART6



0b01000000disable UART7



0b10000000disable USART8
6no_usb_dp_pullup1 bit
USB DP pullup enabling




If different from zero, USB DP pull-up is not set



0USB DP pull-up is set



1USB DP pull-up is not set
5no_cpu_pll1 bit
PLL enabling




If different from zero, PLL are not enabled



0PLLs for CPU/AXI are enable for cold boot



1PLLs for CPU/AXI are not enable for cold boot
4-3sd_if_id2 bits
SD Memory interface




If different from zero, identifies the default instance to be used for memory boot



0Source is default one : SDMMC1 with default AFMux



1SDMMC1 (uses non default AFmux defined in OTP)



2SDMMC2
2-1emmc_if_id2 bits
eMMC™ Memory interface




If different from zero, identifies the default instance to be used for memory boot



0Source is default one : SDMMC2 with default AFMux



1SDMMC1



2SDMMC2 (uses non default AFmux defined in OTP)
0qspi_not_default_af1 bit
QSPI don’t use default AFmux



0QSPI uses default hard coded AFmux



1QSPI uses AFmux defined in OTP

OTP WORD 4 - Monotonic counter

This is an anti rollback monotonic counter. On closed devices, the ROM code checks that it must be less or equal to the one stored in the image header.

BitNameSizeValueDescription
31-0monotonic_val32 bits
Monotonic counter value




Gives the value of monotonic counter



0b1xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 32



0b01xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 31



0b001xxxxxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 30



0b0001xxxxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 29



0b00001xxxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 28



0b000001xxxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 27



0b0000001xxxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 26



0b00000001xxxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 25



0b000000001xxxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 24



0b0000000001xxxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 23



0b00000000001xxxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 22



0b000000000001xxxxxxxxxxxxxxxxxxxxValue of monotonic counter is 21



0b0000000000001xxxxxxxxxxxxxxxxxxxValue of monotonic counter is 20



0b00000000000001xxxxxxxxxxxxxxxxxxValue of monotonic counter is 19



0b000000000000001xxxxxxxxxxxxxxxxxValue of monotonic counter is 18



0b0000000000000001xxxxxxxxxxxxxxxxValue of monotonic counter is 17



0b00000000000000001xxxxxxxxxxxxxxxValue of monotonic counter is 16



0b000000000000000001xxxxxxxxxxxxxxValue of monotonic counter is 15



0b0000000000000000001xxxxxxxxxxxxxValue of monotonic counter is 14



0b00000000000000000001xxxxxxxxxxxxValue of monotonic counter is 13



0b000000000000000000001xxxxxxxxxxxValue of monotonic counter is 12



0b0000000000000000000001xxxxxxxxxxValue of monotonic counter is 11



0b00000000000000000000001xxxxxxxxxValue of monotonic counter is 10



0b000000000000000000000001xxxxxxxxValue of monotonic counter is 9



0b0000000000000000000000001xxxxxxxValue of monotonic counter is 8



0b00000000000000000000000001xxxxxxValue of monotonic counter is 7



0b000000000000000000000000001xxxxxValue of monotonic counter is 6



0b0000000000000000000000000001xxxxValue of monotonic counter is 5



0b00000000000000000000000000001xxxValue of monotonic counter is 4



0b000000000000000000000000000001xxValue of monotonic counter is 3



0b0000000000000000000000000000001xValue of monotonic counter is 2



0b00000000000000000000000000000001Value of monotonic counter is 1



0b00000000000000000000000000000000Value of monotonic counter is 0

OTP WORD 5 to 7 - AFmux configuration

BitFieldSizeValueDescription
31-28port1[3:0]4 bits
Bank id



0unused



1Bank A



2Bank B



3Bank C



4Bank D



5Bank E



6Bank FK



7Bank G



8Bank H



9Bank I



10Bank J



11Bank K



12Bank Z



0b1111XXXInvalid configuration
27-24pin1[3:0]4 bits0-15Pin Id
23-20afmux1[3:0]4 bits0-15AFmux value
19-16mode0[3:0]4 bits
Pin Mode



0AF ; No Pull  ; Low Speed



1AF ; No Pull  ; Medium Speed



2AF ; No Pull  ; High Speed



3AF ; Pull Up  ; Low Speed



4AF ; Pull Up  ; Medium Speed



5AF ; Pull Up  ; High Speed



6AF ; Pull Down  ; Low Speed



7AF ; Pull Down  ; Medium Speed



8AF ; Pull Down  ; High Speed



9GPIO Output High



10GPIO Output Low



11GPIO Input



12GPIO open drain ; No pull



13GPIO open drain ; Pull Up



14GPIO open drain ; Pull Down



15GPIO analog mode
15-12port0[3:0]4 bits
Bank id



0unused



1Bank A



2Bank B



3Bank C



4Bank D



5Bank E



6Bank FK



7Bank G



8Bank H



9Bank I



10Bank J



11Bank K



12Bank Z



0b1111XXXInvalid configuration
8-Novpin0[3:0]4 bits0-15Pin Id
4-Julafmux0[3:0]4 bits0-15AFmux value
31-0pull0mode0[31:0]42 bits
Pin Pull Mode



0AF ; No Pull  ; Low Speed



1AF ; No Pull  ; Medium Speed



2AF ; No Pull  ; High Speed



3AF ; Pull Up  ; Low Speed



4AF ; Pull Up  ; Medium Speed



5AF ; Pull Up  ; High Speed



6AF ; Pull Down  ; Low Speed



7AF ; Pull Down  ; Medium Speed



8AF ; Pull Down  ; High Speed



9GPIO Output High



10GPIO Output Low



11GPIO Input



12GPIO open drain ; No pull



13GPIO open drain ; Pull Up



14GPIO open drain ; Pull Down



15GPIO analog mode; Pull down

OTP WORD 9 - NAND configuration

BitNameSizeValueDescription
31-31nand_param_stored_in_otp1 bit
NAND parameters storage flag



0b0NAND parameters are not stored here in OTP and are available via an ‘ONFI’ compliant get parameter command.



0b1NAND parameters are stored here in OTP
30-29nand_page_size[1:0]2 bits
NAND page size



0Page size is 2 Kbytes



1Page size is 4 Kbytes



2Page size is 8 Kbytes



3reserved
28-27nand_block_size[1:0]2 bits
NAND block size



0Block size is 64 pages



1Block size is 128 pages



2Block size is 256 pages



3reserved
26-19nand_blocks_nb[7:0]8 bits
NAND number of blocks



NNumber of blocks of NAND in unit of 256 blocks (= N * 256 blocks)
18-18fmc_nand_width1 bit
FMC NAND width



0FMC NAND is 8 bits



1FMC NAND is 16 bits
17-15fmc_ecc_bit_nb[2:0]3 bits
FMC NAND number of ECC bits



0No setting. In case on ONFI NAND, means ‘use value defined in parameter table’



11 bit ECC per 512 bytes, Hamming code



24 bit ECC per 512 bytes of data, BCH (Bose, Chaudhuri and Hocquenghem) code



38 bit ECC per 512 bytes of data, BCH (Bose, Chaudhuri and Hocquenghem) code



4on-die ECC
14spinand_need_plane_select1 bit
SPI NAND need plane select



0SPI NAND plane select not needed.



1SPI NAND plane select needed.
13-4reserved11 bits--
3disable_ddr_power_optim1 bit
Disable DDR PLL switch off sequence



0DDR DLL switch off sequence enabled



1DDR DLL switch off sequence disabled.
2disable_hse_bypass_detect1 bit
Disable HSE bypass detection



0HSE bypass detection enabled.



1HSE bypass detection disabled.
1disable_hse_freq_detect1 bit
Disable HSE frequency autodetection



0HSE frequency autodetection enabled.



1HSE frequency autodetection disabled.
0disable_traces1 bit
Disable traces bit



0Bootrom trace are enabled.



1Bootrom trace are disabled.

OTP WORD 24 to 31 - Public Key Hash (PKH)

OTP WORD 24 to 31 contain the SHA256 hash of (ECDSA algorithm id + ECDSA public key) where ECDSA algorithm id is 32-bit length and valid values are ‘1’ for P-256 NIST, or ‘2’ for Brainpool 256.

OTP wordBitFieldSizeDescription
2431-0pkh0[31:0]32 bitsPublic Key Hash[31:0]
2531-0pkh1[31:0]32 bitsPublic Key Hash[63:32]
2631-0pkh2[31:0]32 bitsPublic Key Hash[95:64]
2731-0pkh3[31:0]32 bitsPublic Key Hash[128:96]
2831-0pkh4[31:0]32 bitsPublic Key Hash[159:128]
2931-0pkh5[31:0]32 bitsPublic Key Hash[191:160]
3031-0pkh6[31:0]32 bitsPublic Key Hash[223:192]
3131-0pkh7[31:0]32 bitsPublic Key Hash[255:224]

OTP WORD 56 - RMA password

BitNameSizeDescription
31-30
2 bitsreserved
29-15rma_relock_passwd15 bitsPassword required for RMA ReLock request
14-0rma_passwd15 bitsPassword required for RMA Unlock request


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